Front-End Methodology CAD Engineer - RTL Construction & Analysis

Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.

• Develop, maintain, and enhance automation flows for constructing and modifying RTL for SoCs across multiple design sites
• Develop, maintain, and enhance RTL Analysis Flows (RDC, CDC, Lint) application for SoCs across multiple design sites
• Write Generative AI applications that enhance RTL Construction and Analysis flows
• Utilize debugging experience to debug tool problems and collaborate with designers to help solve their problems
• Work with EDA vendors to drive improvements and new methodologies

• Minimum requirement of Bachelors Degree +3 years of relevant industry experience
• Experience in programming languages such as Perl or Python
• Experience in Verilog/System Verilog
• Preferred Qualifications: Experience in Verific-based Verilog parsers and elaborator
• Demonstrated experience developing large-scale software system development from specification to deployment
• Demonstrated ability to take a spec, create software to meet it, develop the tests to validate the software, document the software, and support it with your customers
• Experience in Generative AI / LLM tools and applications
• Experience in RTL Analysis tools such as Reset-Domain-Crossing (RDC) and Clock-Domain-Crossing (CDC) methodologies
• Source control system management (Perforce, Git) is a plus

• Comprehensive medical and dental coverage
• Retirement benefits
• Discounted products and free services
• Reimbursement for certain educational expenses
• Discretionary bonuses or commission payments
• Relocation assistance

Apple is an equal opportunity employer that is committed to inclusion and diversity