SOC Verification Engineer

SOC Verification Engineer - Jobs - Careers at Apple

• Pre-silicon RTL verification of block and top-level SOC
• Understand details of microarchitecture and build block/chip-level testbench
• Create verification plan from specification and in coordination with architects
• Generate directed and ingenious constrained random tests
• Create/analyze coverage model and enhance testbench/test to increase coverage
• Build automated flows for block and chip-level verification
• Debug failures, manage bug tracking, and close coverage
• Hold detailed verification reviews and set standard for coding quality
• Work closely with team members to improve methodology and flow

• Solid fundamentals in Verilog and SystemVerilog for verification
• Basic knowledge of UVM methodology
• Solid verification skills in problem solving and debugging
• Experience with Constrained Random testing
• Good understanding of overall verification flow
• Knowledge of industry-standard interfaces like I2C, UART, SPI
• Understanding and usage of System Verilog Assertion (SVA)
• Programming experience in C
• Experience writing scripts in languages such as Perl or Python

• Comprehensive medical and dental coverage
• Retirement benefits
• Range of discounted products and free services
• Reimbursement for certain educational expenses
• Discretionary bonuses or commission payments
• Relocation assistance

Apple is an equal opportunity employer that is committed to inclusion and diversity