SoC Physical Design Engineer, PnR

We are seeking a seasoned Physical Design technical leader with deep expertise in high-performance and low-power design. In this highly visible role, you will work closely with cross-functional teams to come up with efficient chip and IP physical architecture taking into account physical design constraints early in the design cycle.

• Design and implement physical design for high-performance and low-power SoCs
• Collaborate with cross-functional teams to develop efficient chip and IP physical architecture
• Develop and maintain methodologies and best-known methods for physical design work
• Perform physical design implementation from RTL to GDS
• Collaborate to drive methodologies and best-known methods to streamline PD work

• Knowledgeable in partition level P&R implementation including floorplanning, clock & power distribution, timing closure, and physical & electrical verification
• Knowledge of PD construction & analysis flows and methodology
• Recent successful tapeouts in deep submicron technology
• Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHz

• 401k matching
• Health insurance
• Flight privileges
• Stock options
• Paid time off
• Retirement plan

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.