Mixed-Signal Clocking and Control RTL Design Engineer

Design logic used to calibrate and control circuits such as oscillators, delay lines and phase interpolators. Analyze control loops for critical parameters such as gain, latency, transients and jitter. Work closely with static timing experts for timing closure and front-end quality tools such as Lint/CDC/RDC.

• Design logic used to calibrate and control circuits
• Analyze control loops for critical parameters
• Work with static timing experts for timing closure and front-end quality tools
• Contribute to post-silicon debug and analysis of designs

• MS degree in technical discipline
• Minimum of 3 years of relevant experience
• Excellent knowledge of digital logic gates, clocking and state elements
• Excellent knowledge of writing synthesizable code in SystemVerilog
• Solid understanding of logic and behavioral simulations

• Comprehensive medical and dental coverage
• Retirement benefits
• Range of discounted products and free services
• Reimbursement for certain educational expenses
• Discretionary bonuses or commission payments
• Relocation assistance

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