SOC Verification Engineer

SOC Verification Engineer - Jobs - Careers at Apple

• Pre-silicon RTL verification of block and top-level SOC
• Interact with all disciplines to develop reusable testbench and verification environment
• Create detailed verification plan from specification and in coordination with architects
• Develop reusable block/IP level test bench and support IP integration verification
• Generate directed and ingenious constrained random tests
• Create/analyze coverage model and enhance testbench/test to increase coverage
• Build automated flows for block and chip level verification
• Debug failures, manage bug tracking, and close coverage
• Hold detailed verification reviews and set standard for coding quality
• Work closely with team members to improve methodology and flow

• BS with 10+ years relevant experience
• Expertise in HVL and HDL (System Verilog, Verilog)
• Advanced knowledge of HVL methodology (UVM/OVM/VMM)
• Solid verification skills in problem solving, constrained random testing, and debugging
• Solid understanding of reusable verification framework
• Knowledge of digital logic design, chip architecture and microarchitecture

• Comprehensive medical and dental coverage
• Retirement benefits
• Range of discounted products and free services
• Reimbursement for certain educational expenses
• Discretionary bonuses or commission payments
• Relocation assistance

Apple