Senior Design Verification Engineer

Senior Design Verification Engineer | Microsoft Careers

• Perform pre-silicon verification for complex IP
• Interact with architects and design engineers
• Define verification strategy, requirements, test environments
• Create test-plans and write tests
• Develop and implement technical solutions
• Triage and debug testbench, simulation, and emulation fails
• Develop Makefiles and scripts for verification infrastructure
• Apply Agile development methodologies

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
• Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
• 5+ years of Technical Engineering Experience with Universal Verification Methodology (UVM), System Verilog, and Verification Fundamentals
• 3+ years of debugging RTL (Verilog) designs as well as simulation and/or emulation environments
• 3+ years experience with verification for product from definition to Silicon, including writing test plans, developing tests, debugging failures and coverage signoff in C/C++ and Universal Verification Methodology (UVM)
• 3+ years experience with scripting language such as Python or Perl or shell scripts

• Industry leading healthcare
• Educational resources
• Discounts on products and services
• Savings and investments
• Maternity and paternity leave
• Generous time away
• Giving programs
• Opportunities to network and connect

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission